0.5 ghz to 4.0 ghz, gaas, spst switch data sheet hmc1055 rev. a document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2016 analog devices, inc. all rights reserved. technical support www.analog.com features low insertion loss: 0.7 db typical at 2.0 ghz high input third-order intercept (ip3): >60 dbm typical single positive control: 0 v or 3 v small, surface-mount, 8-lead, 2 mm 2 mm lfcsp package applications cellular infrastructure wireless infrastructure mobile radios test equipment functional block diagram figure 1. general description the hmc1055 is a low cost, gallium arsenide (gaas), single- pole, single-throw (spst) switch in a surface-mount lfcsp package. this switch offers low insertion loss, high isolation, and exceptional third-order intermodulation performance that make it ideal for many cellular and wireless infrastructure applications from 0.5 ghz to 4.0 ghz. the hmc1055 operates with single positive supply voltage and a single positive control voltage at very low dc currents. rf1 is reflective open, whereas rf2 is terminated to 50 in the off state. 8 7 6 1 3 4 5 2 nic gnd gnd nic rf2 v ctl v dd rf1 gnd package base hmc1055 13718-001
hmc1055 data sheet rev. a | page 2 of 10 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 esd caution .................................................................................. 4 pin configuration and function descriptio ns ............................. 5 interface schematics .....................................................................5 typical performance characteristics ..............................................6 theory of operation .........................................................................8 applications information .................................................................9 evaluation printed circuit board (pcb) ....................................9 evaluation board schematic and artwork ................................9 outline dimensions ....................................................................... 10 ordering guide .......................................................................... 10 revision history 2 /1 6 v00.0912 to rev. a this hittite microwave products data sheet has been reformatted to meet the styles and standards of analog devices, inc. changed nc to nic ...................................................... throughout changes to title, features section, applications section, figure 1, and general description section ................................... 1 changes to table 1 ............................................................................ 3 changes to table 2 ............................................................................ 4 added figure 2 ; renumbered sequentially .................................. 5 changes to table 3 ............................................................................ 5 deleted typical application circuit ............................................... 5 changes to figure 5 ........................................................................... 6 changes to figure 11 and figure 12 ............................................... 7 changes to theory of operation section and table 4 ................. 8 added applications information section, evaluation printed circuit board section, evaluation board schematic and artwork section, and figure 13 ; renumbered sequentially ....... 9 changes to table 5 ............................................................................. 9 updated outline dimensions ....................................................... 10 changes to ordering guide .......................................................... 10
data sheet hmc1055 rev. a | page 3 of 10 specifications v dd = 3 v , v ctl = 0 v or v dd , t a = 25c, 50 ? system, unless otherwise noted. table 1 . parameter test conditions/comments min typ max unit frequency 0.5 4 .0 ghz insertion loss 0.5 ghz to 2.0 ghz 0. 7 db 2.0 ghz to 4.0 ghz 1.4 db isolation 0.5 ghz to 2.0 ghz 36 db 2.0 ghz to 4.0 ghz 28 db return loss on state 0.5 ghz to 2.0 ghz, rf1 and rf2 ports 2 7 db 2.0 ghz to 4.0 ghz, rf1 and rf2 ports 25 db off state 0.5 ghz to 2.0 ghz, rf2 port 12 db 2.0 ghz to 4.0 ghz, rf2 port 24 db input linearity 0.5 ghz to 4.0 ghz input 0.1 db compression (p0.1db) 28 dbm input third - order intercept (ip3) two - tone input power = 15 dbm each tone >60 dbm switching characteristics rise/fall time (t rise , t fal l ) 10% to 90% rf 40 ns on/off time (t on , t off ) 50% v ctl to 90% rf 50 ns current sup ply (i dd ) v dd = 3 v to 5 v 0.2 ma control (i ctl ) 0 v or v dd <5 a
hmc1055 data sheet rev. a | page 4 of 10 absolute maximum rat ings table 2 . parameter rating rf input power (v dd = 3 v, t case = 85 c ) 3 4 dbm supply voltage 6.0 v control voltage range ?0.2 v to v dd + 0.2 v continuous power dissipation, p diss 0.88 w thermal resistance , jc (channel to package bottom) 74c/w channel temperature 150c operating temperature range ?40c to +85c storage temperature range ?65c to +150c reflow temperature 260c (msl 1 rating) esd sensitivity , human body model (hbm) 250 v (class 1a) stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation b eyond the maximum operating conditions for extended periods may affect product reliability. esd caution
data sheet hmc1055 rev. a | page 5 of 10 pin configuration an d function descripti ons figure 2. pin configuration table 3 . pin function descriptions pin no. mnemonic description 1, 4 ni c not internally connected. these pins are n ot internally connected but c an be grounded . 2, 3 gnd ground. these pins must be connected to rf ground. 5 rf1 rf input . this pin is dc - coupled and matched to 50 . a b locking capacitor is required. 6 v dd supply voltage pin. 7 v ctl control input pin. 8 rf2 rf output . this pin is dc - coupled and matched to 50 . a b locking capacitor is required. epad exposed pad. the exposed pad must be connected to rf /dc ground. interface schematics figure 3 . gnd interface schematic figure 4. v ctl interface schematic 13718-002 8 7 6 1 3 4 5 2 nic gnd gnd nic rf2 v ctl v dd rf1 hmc1055 top view (not to scale) notes 1. nic = not internally connected. 2. exposed pad. the exposed pad must be connected to rf/dc ground. gnd 13718-003 r c 13718-004 v ctl
hmc1055 data sheet rev. a | page 6 of 10 typical performance characteristics figure 5 . insertion loss vs. frequency over temperature, v dd = 3 v, v ctl = 3 v figure 6. rf1 return loss vs. frequency over temperature, v dd = 3 v, v ctl = 3 v figure 7. rf1 return loss vs. frequency over temperature, v dd = 3 v, v ctl = 0 v figure 8 . isolation vs. frequency over temperature, v dd = 3 v, v ctl = 0 v figure 9. rf2 return loss vs. frequency over temperature, v dd = 3 v, v ctl = 3 v figure 10 . rf2 return loss vs. frequency over temperature, v dd = 3 v, v ctl = 0 v 0 ?5 ?4 ?3 ?2 ?1 0 1 2 3 4 5 insertion loss (db) frequency (ghz) +85c +25c ?40c 13718-005 0 ?35 ?30 ?25 ?15 ?5 ?20 ?10 return loss (db) 0 1 2 3 4 5 frequency (ghz) +85c +25c ?40c 13718-006 0 ?10 ?8 ?6 ?4 ?2 0 1 2 3 4 5 return loss (db) frequency (ghz) +85c +25c ?40c 13718-007 0 ?70 ?60 ?50 ?30 ?10 ?40 ?20 isolation (db) 0 1 2 3 4 5 frequency (ghz) +85c +25c ?40c 13718-008 0 ?35 ?30 ?25 ?15 ?5 ?20 ?10 return loss (db) 0 1 2 3 4 5 frequency (ghz) +85c +25c ?40c 13718-009 0 ?35 ?30 ?25 ?15 ?5 ?20 ?10 return loss (db) 0 1 2 3 4 5 frequency (ghz) +85c +25c ?40c 13718-010
data sheet hmc1055 rev. a | page 7 of 10 figure 11 . input ip3 vs. frequency over temperature , v dd = 3 v, v ctl = 3 v figure 12 . input p0.1db vs. frequency over temperature , v dd = 3 v, v ctl = 3 v 80 50 55 65 75 60 70 1.0 2.0 3.0 4.0 0.5 1.5 2.5 3.5 input ip3 (dbm) frequency (ghz) +85c +25c ?40c 13718-0 1 1 35 30 25 20 15 10 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 input p0.1db (dbm) frequency (ghz) +85c +25c ?40c 13718-012
hmc1055 data sheet rev. a | page 8 of 10 theory of operation the hmc1055 requi res a single - supply voltage applied to the v dd pin. bypassing capacitors are recommended on the supply line to minimize rf coupling. the hmc1055 is controlled via a single digital control voltage applied to the v ctl pin. when the v ctl pin is high, the switch is set to the o n state, by which an insertion loss path is provided from rf1 to rf2. when the v ctl pin is low, the switch is set to the o ff state, by which rf2 is isolated from rf1 and terminated to 50 ? , whereas rf1 becomes reflective open (se e table 4 ) . the hmc1055 is internally matched to 50 ? at the rf1 and rf2 pins ; therefore, no external matchin g components are required. the rf 1 and rf2 pins are dc - coupled, and dc blocking capacito rs are required on the rf lines. table 4 . truth table supply voltage (v dd ) control voltage (v ctl ) 1 switch mode (rf1 to rf2) 3 v 0 v off 3 v on 5 v 0 v off 5 v on 1 control voltage tolerances are 0.2 v dc.
data sheet hmc1055 rev. a | page 9 of 10 applications information evaluation printed circuit board (pcb) the hmc1055 evaluation board is constructed of a 4-layer material with a copper thickness of 0.7 mil on each layer. every copper layer is separated with a dielectric material. the top dielectric material is 10 mil ro4350. the middle and bottom dielectric materials are fr-4, used for mechanical strength and overall board thickness of approximately 62 mil, which allows sma connectors to be slipped in at the board edges. all rf and dc traces are routed on the top copper layer. the rf transmission lines are designed using a coplanar waveguide (cpwg) model, with a width of 16 mil, spacing of 13 mil, and dielectric thickness of 10 mil, to have a characteristic imped- ance of 50 . the inner and bottom layers are grounded planes to provide a solid ground for the rf transmission lines. for optimal electrical and thermal performance, as many vias as possible are arranged around the transmission lines and under the package exposed pad. the evaluation board layout shown in figure 14 serves as a recommendation for optimal and stable performance, as well as for improvement of thermal efficiency. the package ground pins are connected directly to the ground plane. the supply voltage and control voltage must be con- nected to the dc pins, j3 and j4, respectively, of the evaluation board. one decoupling capacitor is populated on the supply trace to filter high frequency noise. the rf input and output ports (rf1 and rf2) are connected through 50 transmission lines to the sma connectors, j1 and j2, respectively. the rf1 and rf2 ports are ac-coupled with capacitors of an appropriate value to ensure broadband performance. a thru calibration line connects j5 and j6; this transmission line is used to estimate the loss of the pcb over the environmental conditions being evaluated. evaluation board schematic and artwork figure 13. evaluation board schematic table 5. list of materials for EVAL01-HMC1055LP2C item description j1, j2 pcb mount, sma, rf connector j3, j4 dc pin c1 1 nf capacitor, 0402 package c2, c3 330 pf capacitor, 0402 package u1 hmc1055 spst switch pcb 600-00215-00-1 evaluation pcb figure 14. evaluation board layouttop view 13718-013 j6 depop 1 j5 depop 1 c4 330pf depop c5 330pf depop u1 hmc1055 8 7 6 1 3 4 5 2 nic gnd gnd nic rf2 v ctl v dd rf1 j2 rf2 1 c3 330pf j4 j3 j1 rf1 1 c2 330pf c1 1nf 13718-014
hmc1055 data sheet rev. a | page 10 of 10 outline dimensions figure 15 . 8- lead lead frame chip scale package [lfcsp] 2 mm 2 mm body and 0.90 mm package height (cp - 8 - 26) dimensions shown in millimeters ordering guide model 1 temperature range msl rating 2 package description package option branding 3 hmc1055 lp 2c e ?40c to +85c msl 1 8 - lead lead frame chip scale package [lfcsp] cp -8 -26 xxxx 1055 h hmc1 055 lp2ce tr ?40c to +85c msl 1 8 - lead lead frame chip scale package [lfcsp] cp -8 -26 xxxx 1055 h ev al01 - hmc1 055lp2c evaluation board 1 hmc1055lp2ce and hmc1055lp2ce tr are rohs compliant parts. 2 see the absolute maximum ratings section. 3 xxxx is the 4 - digit lot number. 1.25 1.20 1.15 0.40 0.35 0.30 t o p view side view 8 1 5 4 0.30 0.25 0.20 bottom view pin 1 index are a se a ting plane 1.00 0.90 0.80 0.65 0.60 0.55 0.20 ref 0.35 bsc 0.05 max 0.02 nom 0.50 bsc exposed pa d for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. 10-21-2015- a pkg-000000 2.05 2.00 sq 1.95 ? 2016 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d13718 - 0 - 2/16(a)
|
